atomics: Add support for targets without atomics#413
atomics: Add support for targets without atomics#413sfackler merged 5 commits intorust-lang:masterfrom alistair23:alistair/atomics
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Based on the implementation in the headless crate (https://github.com/japaric/heapless/blob/master/build.rs#L26) let's not enable CAS for three more targets. Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Some platforms don't provide a AtomicUsize. Instead of just failing to
build with this error:
291 | use std::sync::atomic::{AtomicUsize, Ordering};
| ^^^^^^^^^^^ no `AtomicUsize` in `sync::atomic`
let's instead add a fake AtomicUsize.
As the platform doesn't have atomics we can't implement an Atomic
version of AtomicUsize, so this version is not atomic. Any platform
without atomics is unlikely to have multiple cores, so this shouldn't be
a problem.
This is somewhat based on:
rust-embedded/heapless@940d2e9
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Ping |
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This seems like a plausible approach, though I think we'll need to have CI target at least one of these architectures so the not(has_atomics) code doesn't rot. |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Done, I have added a CI test to build RISC-V without atomics. |
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Thanks! cc @KodrAus does this seem okay to you as well? It's a bit scary, but it seems reasonable that a platform with no atomics can't really have threads either. |
dtolnay
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I would like the rationale from the PR description to be documented on the unsafe impl.
// Any platform without atomics is unlikely to have multiple cores, so
// writing via Cell will not be a race condition.
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I think I'd feel just a bit safer if we encapsulated the global logger code into a module, so that we limit the reachability of our "fake" |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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I think I have addressed all comments, let me know if there is anything else. |
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Thanks! |
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Thanks for merging. Do you know when the next release will be? |
* Bump dep cargo_toml to v0.12.0 * FIx compilation error * Fix test parse-meta Signed-off-by: Jiahao XU <Jiahao_XU@outlook.com>
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Some targets (such as RV32IMC) don't have atomic support. This PR allows the log crate to build for those targets.
As the platform doesn't have atomics we can't implement an Atomic version of AtomicUsize, so this version is not atomic. Any platform without atomics is unlikely to have multiple cores, so this shouldn't be a problem.
This is somewhat based on implementations in: https://github.com/japaric/heapless