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Add Similarity Search optimization guides - #20

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rsiyer-intel merged 13 commits into
intel:mainfrom
napetrov:similarity-search
Mar 6, 2026
Merged

Add Similarity Search optimization guides#20
rsiyer-intel merged 13 commits into
intel:mainfrom
napetrov:similarity-search

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@napetrov

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Summary

This PR adds documentation for optimizing vector similarity search workloads on Intel Xeon processors.

New Content

  • software/similarity-search/README.md — Overview of Intel's compression technologies (LVQ, LeanVec) for vector search
  • software/similarity-search/redis/README.md — Complete guide for Redis SVS-VAMANA configuration and tuning

Key Topics Covered

  • SVS-VAMANA index configuration in Redis 8.2+
  • Vector compression options (LVQ4x4, LVQ4x8, LVQ8, LeanVec4x8, LeanVec8x8)
  • Performance tuning parameters
  • Benchmarks from Redis tech dive (memory, throughput, latency improvements)
  • Cross-platform compatibility (unified API, works on Intel/AMD/ARM)
  • FAQ addressing common questions

Benchmarks Highlighted

Based on Redis and Intel benchmarking:

  • Memory: 26-37% total reduction vs HNSW
  • Throughput: Up to 144% higher QPS
  • Latency: Up to 60% lower p50/p95

Related: Intel Scalable Vector Search library — https://intel.github.io/ScalableVectorSearch/

- Remove BIOS and hardware recommendation sections
- Add high-level LVQ and LeanVec description
- Replace benchmarks with data from Redis tech dive blog
- Mention SVS can be used directly, integrations in progress
- Remove contributing section
- Focus on compression selection and performance data
- Add FAISS optimization guide with SVS index types
- Cover IndexSVSVamana, IndexSVSVamanaLVQ, IndexSVSVamanaLeanVec
- Include factory string format and examples
- Add compression selection guide
- Include benchmark data from Intel SVS
- Update overview and main README
- Remove benchmark section (no official FAISS SVS performance data)
- Update overview to remove specific performance claims
- Clarify Intel-only requirement in FAQ
- Keep technical how-to guidance
- Add licensing warning for LVQ/LeanVec (AGPLv3/SSPLv1 incompatible)
- Add language spec to FAISS factory string code block
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@ahuber21 ahuber21 left a comment

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Dropping my change request to not block anything while I'm OOO. Still would like to see the FAISS doc sorted out though.

@rsiyer-intel

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@napetrov Do you plan to drop FAISS document in this PR?

@napetrov

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@napetrov Do you plan to drop FAISS document in this PR?

yes, removed.

Would give opportunity to look on this pr for couple other people

@mihaic mihaic left a comment

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Great work, @napetrov! I have some suggestions for your consideration.

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- Fix SVS intro: 'is integrated' instead of 'working on integrating'
- Clarify Level 2 compression: LVQ encodes residuals, LeanVec encodes full dimensionality
- Fix LeanVec4x8 description with reduced/full dimensionality detail
- Fix DISTANCE_METRIC guidance: L2 for normalized embeddings
- Add 'slower build' note to CONSTRUCTION_WINDOW_SIZE
- Fix compression ratios: LVQ4x8 ~2.5x, LeanVec notation with f factor
- Add LeanVec dimensionality reduction factor explanation
- Remove bash markers from Redis command blocks
- Fix SVS-VAMANA parameter count (14 → 12) in LeanVec example
- Remove EPSILON row (not SVS-specific, range search only)
- Fix attribution: Redis benchmarking (authors are Redis)
- Fix precision metric: remove '+' (calibrated value)
- Clarify SVS-VAMANA effectiveness: 'improving throughput'

Co-authored-by: mihaic <mihaic@users.noreply.github.com>
@napetrov
napetrov requested review from ahuber21 and mihaic February 17, 2026 17:52

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A few of my earlier suggestions are unaddressed and there is still a reference to the deleted Faiss document.

Comment thread README.md Outdated
napetrov and others added 2 commits February 17, 2026 12:28
Co-authored-by: Mihai Capotă <mihai@mihaic.ro>
- Remove 'bash' code fence marker from FT.SEARCH example
- Remove SEARCH_BUFFER_CAPACITY row (not SVS-specific, range search only)
@napetrov
napetrov requested a review from mihaic February 25, 2026 16:41

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I marked some previous comments as still relevant. Please have a look.

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@napetrov

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Addressed remaining review comments in commit 82c959e:

  • Removed REDUCE row from Index Parameters table (not SVS-specific per review)
  • Combined "lower-dimensional" and "faster index construction" into one "Use HNSW when" bullet
  • Added hyperlink to Redis Open Source build instructions for BUILD_INTEL_SVS_OPT=yes
  • Reordered "What if recall is too low" FAQ steps: SEARCH_WINDOW_SIZE first, then TRAINING_THRESHOLD (+ "if using LeanVec"), then REDUCE, then compression switch, then GRAPH_MAX_DEGREE

Comment thread software/similarity-search/redis/README.md Outdated
@napetrov

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Done. Added REDUCE back to the table in commit 0ab8dbb.

@aguerreb aguerreb left a comment

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Looks good overall, made a few comments.

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Comment thread software/similarity-search/redis/README.md
- Update intro: add LVQ/LeanVec mention in Redis intro sentence
- Add Vamana algorithm reference (Subramanya et al., NeurIPS 2019)
- GRAPH_MAX_DEGREE: add note 'Equivalent to HNSW M x 2'
- Remove upper bound 3072: change to '768+ dimensions'
- Benchmark LVQ8 note: clarify LeanVec recommended for Cohere/DBpedia in production
- Ingestion trade-offs: replace 'compression overhead' with broader description
- FAQ recall steps: swap steps 2 and 3 (REDUCE before TRAINING_THRESHOLD)
- FAQ ARM: clarify HNSW preferable due to both faster search and ingestion
@napetrov

napetrov commented Mar 4, 2026

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@jasukhar - i think we ready to merge this

@rsiyer-intel
rsiyer-intel merged commit f9c4572 into intel:main Mar 6, 2026
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6 participants