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Nice to have it factored into common code; I suspect that RISC-V will (eventually) benefit from something similar
abadams
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Aug 21, 2023
abadams
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Aug 21, 2023
abadams
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Aug 21, 2023
abadams
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Aug 22, 2023
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There's a nifty clang tidy failure |
abadams
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Aug 22, 2023
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lgtm pending green bots |
abadams
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Aug 22, 2023
This reverts commit eba8f32.
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The @pranavb-ca I'd be happy to hear if you have any ideas about fixing this. I think the particular issue was that |
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Failures appear unrelated |
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* [ARM] distribute shifts as muls This reverts commit eba8f32. --------- Co-authored-by: Steven Johnson <srj@google.com>
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ARM/LLVM currently lowers
a + widening_shl(b, c)into(u | s)shllandadd, this PR lowers it to(u | s)mlal. I reused HVX machinery for the distribution,DistributeShiftsAsMuls. HVX lowering is not expected to change at all.