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[RyuJIT Wasm]: Fix incorrect assert for shift amount type in codegenwasm.cpp#129343

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adamperlin merged 2 commits into
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adamperlin:adamperlin/wasm-fix-shift-codegen-bug
Jun 15, 2026
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[RyuJIT Wasm]: Fix incorrect assert for shift amount type in codegenwasm.cpp#129343
adamperlin merged 2 commits into
dotnet:mainfrom
adamperlin:adamperlin/wasm-fix-shift-codegen-bug

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Fixes #129263; This came up due to the following IL in a regression test:

 ldc.i8 0xa60d377f2863e61c
 ldsflda unsigned int16 ILGEN_0x3c109d11::field_0x1
 ldind.u2
 shr.un

We have a load of a ushort as the shift operand, and this is preserved through import down to codegen.
We were asserting that the exact type for the shift amount operand is TYP_INT, when this may not be the case since the shift amount could be a smaller integer type that still fits in TYP_INT. Instead, the assert should use genActualType

@github-actions github-actions Bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jun 12, 2026

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Pull request overview

This PR adjusts a debug assertion in the Wasm RyuJIT code generator so that 64-bit shift/rotate nodes accept shift-amount operands whose actual type is TYP_INT, even when the operand’s node type is a smaller integral type (e.g., TYP_USHORT).

Changes:

  • In CodeGen::genCodeForShift, replace the strict TypeIs(TYP_INT) check on the shift amount with an genActualType(... ) == TYP_INT check for TYP_LONG shifts/rotates.

Comment thread src/coreclr/jit/codegenwasm.cpp

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Fix up the comment and we're good.

@adamperlin adamperlin merged commit dabcb41 into dotnet:main Jun 15, 2026
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@adamperlin adamperlin deleted the adamperlin/wasm-fix-shift-codegen-bug branch June 15, 2026 18:20
@pavelsavara pavelsavara added the arch-wasm WebAssembly architecture label Jun 16, 2026
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Tagging subscribers to 'arch-wasm': @lewing, @pavelsavara
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arch-wasm WebAssembly architecture area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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Wasm / R2R: crossgen2 assert in genCodeForShift on long shift with non-INT shift amount

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