Revert "Accelerate Half with FP16 ISA"

[tannergooding]

Reverts #122649

[dotnet-policy-service]

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[Copilot]

Pull request overview

Reverts the previously introduced FP16/AVX10v1 acceleration work for System.Half by removing Half-specific intrinsic tagging and ABI/JIT special-casing, returning Half handling to the prior “regular struct / via float” behavior across CoreLib, VM call paths, and the JIT.

Changes:

• Removes System.Half intrinsic annotations and Half-specific intrinsic IDs/patterns in the JIT.
• Removes VM/JIT calling convention and reflection invocation special-casing for passing/returning Half in FP registers.
• Deletes FP16 helper plumbing/types (float16_t) and associated instruction/perf-modeling hooks added for Half.

Reviewed changes

Copilot reviewed 46 out of 47 changed files in this pull request and generated 1 comment.

Show a summary per file

File	Description
src/libraries/System.Private.CoreLib/src/System/Half.cs	Removes [Intrinsic] usage and converts some static properties back to non-intrinsic forms.
src/coreclr/vm/typehandle.h	Removes TypeHandle::IsNativeHalfType declaration.
src/coreclr/vm/typehandle.cpp	Removes TypeHandle::IsNativeHalfType implementation.
src/coreclr/vm/reflectioninvocation.cpp	Removes Half special-casing when building the reg type map for reflection invocation.
src/coreclr/vm/methodtable.h	Removes MethodTable::IsNativeHalfType declaration.
src/coreclr/vm/invokeutil.cpp	Removes Half-specific argument copy/zero-extension path for reflection invoke.
src/coreclr/vm/class.cpp	Removes MethodTable::IsNativeHalfType logic tied to AVX10v1 detection.
src/coreclr/vm/callingconvention.h	Removes Half special-casing for FP register argument/return classification.
src/coreclr/vm/callhelpers.cpp	Removes Half special-casing when building call descriptor register type maps.
src/coreclr/vm/amd64/profiler.cpp	Removes profiler iterator Half special-casing for arg/return FP classification.
src/coreclr/jit/vartype.h	Removes varTypeIsStructPrimitive and stops treating TYP_HALF as float-reg passing.
src/coreclr/jit/valuenumfuncs.h	Updates HW intrinsic macro shape and resets the VN HW intrinsic range end marker.
src/coreclr/jit/valuenum.h	Removes half-constant VN support and TYP_HALF handling in VN storage/queries.
src/coreclr/jit/valuenum.cpp	Removes half-constant VN map/allocation and TYP_HALF constant creation paths.
src/coreclr/jit/utils.h	Removes float16_t include and half conversion/bit helpers.
src/coreclr/jit/utils.cpp	Removes double<->half conversion and half bit conversion helpers.
src/coreclr/jit/typelist.h	Removes TYP_HALF type entry.
src/coreclr/jit/simd.h	Removes float16_t usage from SIMD union helpers.
src/coreclr/jit/simd.cpp	Removes System.Half recognition as an “accelerated type” in SIMD type discovery.
src/coreclr/jit/scopeinfo.cpp	Removes TYP_HALF cases in variable location recording.
src/coreclr/jit/registeropswasm.cpp	Removes TYP_HALF mapping entries for WASM value types.
src/coreclr/jit/regalloc.cpp	Removes TYP_HALF from register-candidate classification.
src/coreclr/jit/namedintrinsiclist.h	Removes System.Half named intrinsics and updates HW intrinsic macro signature.
src/coreclr/jit/morph.cpp	Switches back to SIMD-only size heuristics and removes TYP_HALF struct-promotion exclusion.
src/coreclr/jit/lsraxarch.cpp	Removes AVX10v1 scalar FMA case from intrinsic handling.
src/coreclr/jit/lsrabuild.cpp	Removes TYP_HALF from return build classification.
src/coreclr/jit/lowerxarch.cpp	Removes AVX10v1 half compare/round related lowering cases and TYP_HALF assertions.
src/coreclr/jit/lower.cpp	Removes TYP_HALF handling in struct-call lowering and FP-store retyping checks.
src/coreclr/jit/lclvars.cpp	Switches struct size heuristic naming back to SIMD-only.
src/coreclr/jit/instrsxarch.h	Reverts various FP16/AVX10v1 instruction metadata flags/tuple types.
src/coreclr/jit/instr.cpp	Removes TYP_HALF load/store/copy instruction selection (INS_vmovsh).
src/coreclr/jit/importercalls.cpp	Removes System.Half intrinsic expansion and TYP_HALF signature normalization.
src/coreclr/jit/importer.cpp	Reverts SIMD normalization logic and removes Half special handling during struct normalization.
src/coreclr/jit/hwintrinsiccodegenxarch.cpp	Removes InstructionSet_AVX10v1 from the intrinsic codegen dispatch.
src/coreclr/jit/hwintrinsic.h	Normalizes HW intrinsic instruction table to 10 entries (no TYP_HALF).
src/coreclr/jit/hwintrinsic.cpp	Updates instruction lookup to cap at TYP_DOUBLE (no TYP_HALF).
src/coreclr/jit/gentree.h	Removes TYP_HALF support in vector constant materialization.
src/coreclr/jit/gentree.cpp	Removes TYP_HALF zero-constant and SIMD scalar creation/to-scalar support.
src/coreclr/jit/float16.h	Deletes the temporary float16_t typedef header.
src/coreclr/jit/emitxarch.cpp	Removes AVX10v1-specific FMA range check and INS_vmovsh handling/perf modeling.
src/coreclr/jit/emit.h	Removes perf-score constants only used by reverted FP16 perf modeling.
src/coreclr/jit/compiler.h	Removes Half intrinsic lookup helpers and renames SIMD size heuristic to SIMD-only.
src/coreclr/jit/compiler.cpp	Removes isNativeHalfStructType and treats 2-byte structs as TYP_USHORT for unmanaged.
src/coreclr/jit/codegenxarch.cpp	Removes TYP_HALF return/struct-call assertions and SIMD/stack-arg special-casing.
src/coreclr/jit/codegencommon.cpp	Removes TYP_HALF special-case assertion for AMD64 Windows struct returns.
src/coreclr/jit/abi.cpp	Removes mapping of 2-byte FP register segments to TYP_HALF.

[jkotas]

cc @anthonycanino

[jkotas]

Thanks

[tannergooding]

/ba-g build analysis stalled, all failures are known and this is a simple revert