Add sse4/avx2 support for fast x86 int8 (vpmaddubsw/vpmaddwd/vpaddd)#8897
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masahi merged 4 commits intoapache:mainfrom Sep 9, 2021
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Add sse4/avx2 support for fast x86 int8 (vpmaddubsw/vpmaddwd/vpaddd)#8897masahi merged 4 commits intoapache:mainfrom
masahi merged 4 commits intoapache:mainfrom
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- Extend the list of different target for x86 topi - Extend tests for conv2d x86 int8 for fast i8 x86 platforms
vinx13
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Sep 2, 2021
jcf94
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Sep 3, 2021
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The change in get_fp32_len affected ARM flow - now it started to block by 4 instead previous default 8. It must not affect from performance point of view since NEON SIMD vector size is 64 or 128 bit, but will affect the knowledge database of tuned kernels. Will verify the performance aspect on ARM. As for backward compatibility - still open question. So far I have an impression that we do not care about it so much. |
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I verified ARM flow and confirm that it started to use 4 channel values instead of 8 for blocking and this fact did not affect performance anyhow (as i expected) |
ylc
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Sep 29, 2021
…pache#8897) * Add sse4/avx2 support for vpmaddubsw/vpmaddwd/vpaddd - Extend the list of different target for x86 topi - Extend tests for conv2d x86 int8 for fast i8 x86 platforms * fix code style * Change x86-64-v2 to nahalem in test to support llvm11 * Change test target to get NCHW8c
ylc
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Jan 13, 2022
…pache#8897) * Add sse4/avx2 support for vpmaddubsw/vpmaddwd/vpaddd - Extend the list of different target for x86 topi - Extend tests for conv2d x86 int8 for fast i8 x86 platforms * fix code style * Change x86-64-v2 to nahalem in test to support llvm11 * Change test target to get NCHW8c
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this change in theory can give up to 2x speedup on int8 models vs fp32 models, currently slightly less
Resnet50 performance:
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