GH-43687: [C++] Compute: fix register kernel SimdLevel for AddMinMax512AggKernels

[mapleFU]

Rationale for this change

See #43687

What changes are included in this PR?

Change Registered AVX2 to AVX512

Are these changes tested?

No

Are there any user-facing changes?

maybe bugfix

• GitHub Issue: [C++] compute: Why AddMinMaxAvx512AggKernels add AVX2 in some cases #43687

[github-actions]

⚠️ GitHub issue #43687 has been automatically assigned in GitHub to PR creator.

[zanmato1984]

+1

[felipecrv]

I'm approving and we should merge this, but I'm working on a PR that removes the SimdLevel template parameter alltogether as there is no need to runtime dispatch different SIMD levels when we are relying on compiler auto-vectorization.

Discussion here: #7871

[mapleFU]

Will merge this firstly

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[felipecrv]

@ursabot please benchmark command=cpp-micro --suite-filter=arrow-acero-aggregate-benchmark --benchmark-filter=MinMaxKernel* --iterations=3

[ursabot]

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[conbench-apache-arrow]

Thanks for your patience. Conbench analyzed the 0 benchmarking runs that have been run so far on PR commit cb073ed.

None of the specified runs were found on the Conbench server.

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[conbench-apache-arrow]

After merging your PR, Conbench analyzed the 7 benchmarking runs that have been run so far on merge-commit 2e434da.

There were 3 benchmark results indicating a performance regression:

• Commit Run on amd64-m5-4xlarge-linux at 2024-08-15 17:26:35Z
  • file-write (R) with compression=lz4, dataset=nyctaxi_2010-01, file_type=feather, input_type=dataframe, language=R
  • file-write (R) with compression=uncompressed, dataset=nyctaxi_2010-01, file_type=feather, input_type=dataframe, language=R
• and 1 more (see the report linked below)

The full Conbench report has more details. It also includes information about 5 possible false positives for unstable benchmarks that are known to sometimes produce them.