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SureLog - UHDM

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  1. Surelog Surelog Public

    Forked from chipsalliance/Surelog

    SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

    C++ 26 4

  2. UHDM UHDM Public

    Forked from chipsalliance/UHDM

    Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format …

    C++ 18 2

  3. uhdm2rtlil uhdm2rtlil Public

    UHDM 2 RTLIL Yosys Pass

    Verilog 4

  4. Help_Wanted Help_Wanted Public

    Ideas that need engineering-power from the community for UHDM/Surelog/Related topics

    2

  5. yosys-uhdm-plugin-integration yosys-uhdm-plugin-integration Public

    Forked from chipsalliance/synlig

    Python 2

  6. verilator verilator Public

    Forked from antmicro/verilator-old-archived

    C++

Repositories

Showing 10 of 14 repositories
  • uhdm2rtlil Public

    UHDM 2 RTLIL Yosys Pass

    alainmarcel/uhdm2rtlil’s past year of commit activity
    Verilog 4 Apache-2.0 0 0 0 Updated Sep 17, 2025
  • Surelog Public Forked from chipsalliance/Surelog

    SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

    alainmarcel/Surelog’s past year of commit activity
    C++ 26 Apache-2.0 81 0 0 Updated Sep 9, 2025
  • UHDM Public Forked from chipsalliance/UHDM

    Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

    alainmarcel/UHDM’s past year of commit activity
    C++ 18 Apache-2.0 44 0 0 Updated Sep 6, 2025
  • yosys Public Forked from YosysHQ/yosys

    Yosys Open SYnthesis Suite

    alainmarcel/yosys’s past year of commit activity
    C++ 0 ISC 1,048 0 0 Updated Jun 19, 2025
  • yosys_akash Public Forked from akashlevy/yosys

    Yosys Open SYnthesis Suite

    alainmarcel/yosys_akash’s past year of commit activity
    C++ 0 ISC 1,048 0 0 Updated Dec 21, 2024
  • alainmarcel/yosys-uhdm-plugin-integration’s past year of commit activity
    Python 2 Apache-2.0 28 0 0 Updated Sep 1, 2023
  • sv-tests Public Forked from chipsalliance/sv-tests

    Test suite designed to check compliance with the SystemVerilog standard.

    alainmarcel/sv-tests’s past year of commit activity
    SystemVerilog 0 ISC 89 0 0 Updated Jul 30, 2023
  • antlr4 Public Forked from antlr/antlr4

    ANTLR (ANother Tool for Language Recognition) is a powerful parser generator for reading, processing, executing, or translating structured text or binary files.

    alainmarcel/antlr4’s past year of commit activity
    Java 0 3,471 0 0 Updated Apr 13, 2022
  • simview Public Forked from pieter3d/simview
    alainmarcel/simview’s past year of commit activity
    C++ 0 MIT 6 0 0 Updated Jan 23, 2022
  • alainmarcel/UHDM-integration-tests’s past year of commit activity
    C++ 0 Apache-2.0 9 0 0 Updated Jun 22, 2021

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