Update pre-commit hooks

.pre-commit-config.yaml

@@ -18,14 +18,22 @@ repos:
     hooks:
       - id: clang-tidy
         files: \.(c|h|cpp|hpp)$
-        args: [--fix, --quiet, --use-color]
+        args:
+          [
+            --fix,
+            --quiet,
+            --use-color,
+            -p=compile_commands.json,
+            -extra-arg=-Wno-unknown-warning-option,
+            -checks=-modernize-use-bool-literals,
+          ]
         types_or: [text]
-        additional_dependencies: [clang-tidy==19.1.0]
+        additional_dependencies: [clang-tidy==22.1.8]
         require_serial: true
         stages: [manual] # Not automatically triggered, invoked via `pre-commit run --hook-stage manual clang-tidy`
 
   - repo: https://github.com/astral-sh/ruff-pre-commit
-    rev: v0.13.1
+    rev: v0.15.22
     hooks:
       - id: ruff-check
         args: [--fix]
@@ -36,17 +44,17 @@ repos:
         types_or: [text]
 
   - repo: https://github.com/pre-commit/mirrors-mypy
-    rev: v1.15.0
+    rev: v2.3.0
     hooks:
       - id: mypy
         files: \.py$
         types_or: [text]
 
   - repo: https://github.com/crate-ci/typos
-    rev: v1.30.2
+    rev: v1.48.0
     hooks:
       - id: typos
         # exclude: |
         #   (?x)^(
         #   )
-        additional_dependencies: [tomli]
+        additional_dependencies: [tomli]

pyproject.toml

@@ -35,3 +35,9 @@ default.extend-ignore-re = [
 	"(?s)(#|//)\\s*spellchecker:off.*?\\n\\s*(#|//)\\s*spellchecker:on", # Multiline check disable with // spellchecker:off // spellchecker:on (can also use #)
 	"(?s)(/\\*)\\s*spellchecker:off.*?\\s*spellchecker:on\\s*(\\*/)",    # Multiline check disable with /* spellchecker:off ... spellchecker:on */
 ]
+
+[tool.typos.type.skip_names]
+extend-glob = ["AUTHORS.md", "COPYRIGHT", "CODE_OF_CONDUCT.md", "credits.csv"]
+
+[tool.typos.type.skip_names.extend-identifiers]
+Catylist = "Catylist"

src/openvic-simulation/economy/production/ArtisanalProducer.cpp

@@ -190,7 +190,7 @@ void ArtisanalProducer::artisan_tick_handler::allocate_money_for_inputs(
 		return;
 	}
 
-	//Figure out the optimal amount of goods to buy based on their price, stockpiled quantiy & demand
+	//Figure out the optimal amount of goods to buy based on their price, stockpiled quantity & demand
 	fixed_point_t max_possible_satisfaction_numerator= 1,
 		max_possible_satisfaction_denominator= 1;
 

src/openvic-simulation/ecs/CommandBuffer.hpp

@@ -314,9 +314,9 @@ namespace OpenVic::ecs {
 		};
 
 		struct AddPayload {
-			component_type_id_t id;
+			component_type_id_t id = 0UL;
 			PayloadSlot value; // .vtable always set (even for tag — size==0); .data null for tag/default
-			bool is_default; // true when add_component<C>() with no value
+			bool is_default = false; // true when add_component<C>() with no value
 		};
 
 		struct Op {

src/openvic-simulation/ecs/SystemScheduler.cpp

@@ -525,7 +525,7 @@ void SystemScheduler::run(
 						(*cbs)[i].set_parallel_mode(true);
 					}
 					for (std::size_t i = 0; i < chunks.size(); ++i) {
-						WorkItem item;
+						WorkItem item {};
 						item.kind = WorkKind::ThreadedChunk;
 						item.reg_idx = reg_idx;
 						item.archetype_idx = chunks[i].archetype_idx;
@@ -540,7 +540,7 @@ void SystemScheduler::run(
 					// Plain System<> (or a SystemThreaded with no entry points — shouldn't
 					// happen post-Phase-0). One whole-tick work item; dispatch_serial
 					// inside tick_all does not depend on current_system_registration_.
-					WorkItem item;
+					WorkItem item {};
 					item.kind = WorkKind::SerialWhole;
 					item.reg_idx = reg_idx;
 					item.archetype_idx = 0;

src/openvic-simulation/scripts/Condition.cpp

@@ -261,7 +261,7 @@ bool ConditionManager::setup_conditions(DefinitionManager const& definition_mana
 	ret &= add_condition("this_culture_union", IDENTIFIER, COUNTRY, NO_SCOPE, NO_IDENTIFIER, CULTURE_UNION);
 	ret &= add_condition("total_amount_of_divisions", INTEGER, COUNTRY);
 	ret &= add_condition("total_amount_of_ships", INTEGER, COUNTRY);
-	ret &= add_condition("total_defensives", INTEGER, COUNTRY);
+	ret &= add_condition("total_defensives", INTEGER, COUNTRY); // paradox typo
 	ret &= add_condition("total_num_of_ports", INTEGER, COUNTRY);
 	ret &= add_condition("total_of_ours_sunk", INTEGER, COUNTRY);
 	ret &= add_condition("total_pops", INTEGER, COUNTRY);

tests/src/ecs/SystemSchedulerSingletonWrites.cpp

@@ -46,7 +46,9 @@ namespace {
 			SgwState* state = ctx.world.get_singleton<SgwState>();
 			state->acc = (state->acc * 31 + a.v) % 1000003;
 			a.v = (a.v * 7 + 3) % 1000003;
-			if (g_sgw_log) g_sgw_log->push_back(1);
+			if (g_sgw_log) {
+				g_sgw_log->push_back(1);
+			}
 		}
 	};
 
@@ -71,7 +73,9 @@ namespace {
 		void tick(TickContext const& ctx, SgwB& b) {
 			SgwState const* state = ctx.world.get_singleton<SgwState>();
 			b.v = (b.v * 13 + state->acc) % 1000003;
-			if (g_sgw_log) g_sgw_log->push_back(2);
+			if (g_sgw_log) {
+				g_sgw_log->push_back(2);
+			}
 		}
 	};
 

tests/src/ecs/SystemScheduler_Conflicts.cpp

@@ -27,27 +27,35 @@ namespace {
 	struct ConflictWriterA : System<ConflictWriterA> {
 		void tick(TickContext const& /*ctx*/, ConflictTagX& x) {
 			x.n += 1;
-			if (g_conflict_log) g_conflict_log->push_back(1);
+			if (g_conflict_log) {
+				g_conflict_log->push_back(1);
+			}
 		}
 	};
 
 	struct ConflictWriterB : System<ConflictWriterB> {
 		void tick(TickContext const& /*ctx*/, ConflictTagX& x) {
 			x.n *= 2;
-			if (g_conflict_log) g_conflict_log->push_back(2);
+			if (g_conflict_log) {
+				g_conflict_log->push_back(2);
+			}
 		}
 	};
 
 	// R/R is fine — should run in the same stage with no conflict edge required.
 	struct ConflictReaderA : System<ConflictReaderA> {
 		void tick(TickContext const& /*ctx*/, ConflictTagY const& /*y*/) {
-			if (g_conflict_log) g_conflict_log->push_back(11);
+			if (g_conflict_log) {
+				g_conflict_log->push_back(11);
+			}
 		}
 	};
 
 	struct ConflictReaderB : System<ConflictReaderB> {
 		void tick(TickContext const& /*ctx*/, ConflictTagY const& /*y*/) {
-			if (g_conflict_log) g_conflict_log->push_back(12);
+			if (g_conflict_log) {
+				g_conflict_log->push_back(12);
+			}
 		}
 	};
 }

tests/src/ecs/SystemScheduler_DAG.cpp

@@ -45,7 +45,9 @@ ECS_SYSTEM(SchedDagSystemC)
 namespace {
 	struct SchedDagSystemA : System<SchedDagSystemA> {
 		void tick(TickContext const& /*ctx*/, SchedulerTagA& /*t*/) {
-			if (g_scheduler_dag_log) g_scheduler_dag_log->push_back(1);
+			if (g_scheduler_dag_log) {
+				g_scheduler_dag_log->push_back(1);
+			}
 		}
 	};
 
@@ -57,7 +59,9 @@ namespace {
 			};
 		}
 		void tick(TickContext const& /*ctx*/, SchedulerTagB& /*t*/) {
-			if (g_scheduler_dag_log) g_scheduler_dag_log->push_back(2);
+			if (g_scheduler_dag_log) {
+				g_scheduler_dag_log->push_back(2);
+			}
 		}
 	};
 
@@ -69,7 +73,9 @@ namespace {
 			};
 		}
 		void tick(TickContext const& /*ctx*/, SchedulerTagC& /*t*/) {
-			if (g_scheduler_dag_log) g_scheduler_dag_log->push_back(3);
+			if (g_scheduler_dag_log) {
+				g_scheduler_dag_log->push_back(3);
+			}
 		}
 	};
 }
@@ -124,7 +130,11 @@ TEST_CASE("Scheduler order is identical regardless of registration order",
 		}
 		world.tick_systems(Date {});
 
-		if (run == 0) log_first = log; else log_second = log;
+		if (run == 0) {
+			log_first = log;
+		} else {
+			log_second = log;
+		}
 		g_scheduler_dag_log = nullptr;
 	}