correct addr bus width#142
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acastellane merged 1 commit intomasterfrom Oct 12, 2021
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Signed-off-by: Bruno Mesnet <bruno.mesnet@fr.ibm.com>
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By limiting the MMIO address to 9 bits (while some HLS actions needs 10 bits with vivado < 2020.2), this bad change was preventing some actions from starting almost the HLS memcopy actions) |
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Signed-off-by: Bruno Mesnet bruno.mesnet@fr.ibm.com