Dsu updates

[etwest]

DSU updates to use path halving
Serialized size getters for Supernode and Sketch

[etwest]

I added a benchmark that tests the performance of DSU merging/joining and compared the results of that benchmark with this DSU design and that of our previous implementation.

This test is actually two benchmarks. The first BM_DSU_Adversarial attempts to join by elements that are far from the root. The second BM_DSU_Root always joins by the root. In either case, the new design has a lower latency.

------------------------------------------------------------------------------------
New DSU Design with Path Halving and No Recursion
16 * 1024^2 dsu slots
------------------------------------------------------------------------------------
Benchmark                          Time             CPU   Iterations UserCounters...
------------------------------------------------------------------------------------
BM_DSU_Adversarial        2494977485 ns   2494916611 ns            1 Merge_Latency=148.709ns
BM_DSU_Adversarial        2495141434 ns   2495039442 ns            1 Merge_Latency=148.716ns
BM_DSU_Adversarial        2503770307 ns   2503615561 ns            1 Merge_Latency=149.227ns
BM_DSU_Adversarial        2501165353 ns   2500977354 ns            1 Merge_Latency=149.07ns
BM_DSU_Adversarial_mean   2498763645 ns   2498637242 ns            4 Merge_Latency=148.93ns
BM_DSU_Adversarial_median 2498153393 ns   2498008398 ns            4 Merge_Latency=148.893ns
BM_DSU_Adversarial_stddev    4407958 ns      4360697 ns            4 Merge_Latency=259.918ps
BM_DSU_Adversarial_cv           0.18 %          0.17 %             4 Merge_Latency=0.17%
BM_DSU_Root               1859009603 ns   1858916553 ns            1 Merge_Latency=110.8ns
BM_DSU_Root               1856458947 ns   1856336286 ns            1 Merge_Latency=110.646ns
BM_DSU_Root               1857937291 ns   1857836383 ns            1 Merge_Latency=110.736ns
BM_DSU_Root               1861907318 ns   1861758112 ns            1 Merge_Latency=110.969ns
BM_DSU_Root_mean          1858828290 ns   1858711834 ns            4 Merge_Latency=110.788ns
BM_DSU_Root_median        1858473447 ns   1858376468 ns            4 Merge_Latency=110.768ns
BM_DSU_Root_stddev           2303689 ns      2289932 ns            4 Merge_Latency=136.491ps
BM_DSU_Root_cv                  0.12 %          0.12 %             4 Merge_Latency=0.12%
------------------------------------------------------------------------------------
------------------------------------------------------------------------------------
Old DSU Design: Recursive and Full Path Compression
16 * 1024^2 dsu slots
------------------------------------------------------------------------------------
Benchmark                          Time             CPU   Iterations UserCounters...
------------------------------------------------------------------------------------
BM_DSU_Adversarial        3161243930 ns   3161136092 ns            1 Merge_Latency=188.418ns
BM_DSU_Adversarial        3152408414 ns   3152187043 ns            1 Merge_Latency=187.885ns
BM_DSU_Adversarial        3166596252 ns   3166405172 ns            1 Merge_Latency=188.732ns
BM_DSU_Adversarial        3162937313 ns   3162799665 ns            1 Merge_Latency=188.518ns
BM_DSU_Adversarial_mean   3160796477 ns   3160631993 ns            4 Merge_Latency=188.388ns
BM_DSU_Adversarial_median 3162090622 ns   3161967879 ns            4 Merge_Latency=188.468ns
BM_DSU_Adversarial_stddev    6021639 ns      6044273 ns            4 Merge_Latency=360.267ps
BM_DSU_Adversarial_cv           0.19 %          0.19 %             4 Merge_Latency=0.19%
BM_DSU_Root               2767111730 ns   2766965517 ns            1 Merge_Latency=164.924ns
BM_DSU_Root               2760186827 ns   2760045783 ns            1 Merge_Latency=164.512ns
BM_DSU_Root               2765316721 ns   2765146169 ns            1 Merge_Latency=164.816ns
BM_DSU_Root               2754219001 ns   2754033167 ns            1 Merge_Latency=164.153ns
BM_DSU_Root_mean          2761708570 ns   2761547659 ns            4 Merge_Latency=164.601ns
BM_DSU_Root_median        2762751774 ns   2762595976 ns            4 Merge_Latency=164.664ns
BM_DSU_Root_stddev           5791437 ns      5803036 ns            4 Merge_Latency=345.888ps
BM_DSU_Root_cv                  0.21 %          0.21 %             4 Merge_Latency=0.21%

[etwest]

Now that we have confirmation that this new design isn't a performance detriment, I'd like to get these changes merged.

[kennyzzhang]

A few small changes